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<a href="#nested-classes">Data Structures</a> &#124;
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_hw_icap___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> driver instance data.  <a href="struct_x_hw_icap.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga52f19423a8a68df00cec1517428d8cf7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga52f19423a8a68df00cec1517428d8cf7">PCAP_CR_OFFSET</a>&#160;&#160;&#160;0xFFCA3008</td></tr>
<tr class="memdesc:ga52f19423a8a68df00cec1517428d8cf7"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCAP CR Register.  <a href="#ga52f19423a8a68df00cec1517428d8cf7">More...</a><br/></td></tr>
<tr class="separator:ga52f19423a8a68df00cec1517428d8cf7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga578d555615b032cd9675c91f60dfb2bd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga578d555615b032cd9675c91f60dfb2bd">XHwIcap_FifoWrite</a>(InstancePtr, Data)</td></tr>
<tr class="memdesc:ga578d555615b032cd9675c91f60dfb2bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write data to the Write FIFO.  <a href="#ga578d555615b032cd9675c91f60dfb2bd">More...</a><br/></td></tr>
<tr class="separator:ga578d555615b032cd9675c91f60dfb2bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab24c5878ebb17d6bb12e6e6f00a70ccc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gab24c5878ebb17d6bb12e6e6f00a70ccc">XHwIcap_FifoRead</a>(InstancePtr)&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#ga880c301214287dc0231e142662bba24c">XHI_RF_OFFSET</a>))</td></tr>
<tr class="memdesc:gab24c5878ebb17d6bb12e6e6f00a70ccc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read data from the Read FIFO.  <a href="#gab24c5878ebb17d6bb12e6e6f00a70ccc">More...</a><br/></td></tr>
<tr class="separator:gab24c5878ebb17d6bb12e6e6f00a70ccc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga55440f403fc15d562124e9abe8ddbc61"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga55440f403fc15d562124e9abe8ddbc61">XHwIcap_SetSizeReg</a>(InstancePtr, Data)</td></tr>
<tr class="memdesc:ga55440f403fc15d562124e9abe8ddbc61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the number of words to be read from the Icap in the Size register.  <a href="#ga55440f403fc15d562124e9abe8ddbc61">More...</a><br/></td></tr>
<tr class="separator:ga55440f403fc15d562124e9abe8ddbc61"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae175cdfd7a3fd2a9c0a68c1e4968572f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f">XHwIcap_GetControlReg</a>(InstancePtr)&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>))</td></tr>
<tr class="memdesc:gae175cdfd7a3fd2a9c0a68c1e4968572f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the Control register.  <a href="#gae175cdfd7a3fd2a9c0a68c1e4968572f">More...</a><br/></td></tr>
<tr class="separator:gae175cdfd7a3fd2a9c0a68c1e4968572f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac688a85edeec278c8b0c88d00268e19e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gac688a85edeec278c8b0c88d00268e19e">XHwIcap_StartConfig</a>(InstancePtr)</td></tr>
<tr class="memdesc:gac688a85edeec278c8b0c88d00268e19e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Control Register to initiate a configuration (write) to the device.  <a href="#gac688a85edeec278c8b0c88d00268e19e">More...</a><br/></td></tr>
<tr class="separator:gac688a85edeec278c8b0c88d00268e19e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d43f1b9f75258d0b29b1877a107536b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga1d43f1b9f75258d0b29b1877a107536b">XHwIcap_StartReadBack</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga1d43f1b9f75258d0b29b1877a107536b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Control Register to initiate a ReadBack from the device.  <a href="#ga1d43f1b9f75258d0b29b1877a107536b">More...</a><br/></td></tr>
<tr class="separator:ga1d43f1b9f75258d0b29b1877a107536b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga656dcfd3edf2dd7e5733af4db36bf69c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga656dcfd3edf2dd7e5733af4db36bf69c">XHwIcap_GetStatusReg</a>(InstancePtr)&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#gad582c2c3fe5aa1d83b43dc7a0d243da8">XHI_SR_OFFSET</a>))</td></tr>
<tr class="memdesc:ga656dcfd3edf2dd7e5733af4db36bf69c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the status register.  <a href="#ga656dcfd3edf2dd7e5733af4db36bf69c">More...</a><br/></td></tr>
<tr class="separator:ga656dcfd3edf2dd7e5733af4db36bf69c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6515e336f30e4f6b3285035a7f939567"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga6515e336f30e4f6b3285035a7f939567">XHwIcap_IsTransferDone</a>(InstancePtr)&#160;&#160;&#160;((InstancePtr-&gt;IsTransferInProgress) ? FALSE : TRUE)</td></tr>
<tr class="memdesc:ga6515e336f30e4f6b3285035a7f939567"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro checks if the last Read/Write of the data to the Read/Write FIFO of the HwIcap device is completed.  <a href="#ga6515e336f30e4f6b3285035a7f939567">More...</a><br/></td></tr>
<tr class="separator:ga6515e336f30e4f6b3285035a7f939567"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1d1213b70d3c503aa0ccd27c0a57857"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857">XHwIcap_IsDeviceBusy</a>(InstancePtr)</td></tr>
<tr class="memdesc:gac1d1213b70d3c503aa0ccd27c0a57857"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro checks if the last Read/Write to the ICAP device in the FPGA is completed.  <a href="#gac1d1213b70d3c503aa0ccd27c0a57857">More...</a><br/></td></tr>
<tr class="separator:gac1d1213b70d3c503aa0ccd27c0a57857"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa952277368fc2024057861071922661f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa952277368fc2024057861071922661f">XHwIcap_IntrGlobalEnable</a>(InstancePtr)</td></tr>
<tr class="memdesc:gaa952277368fc2024057861071922661f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro enables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is enabled.  <a href="#gaa952277368fc2024057861071922661f">More...</a><br/></td></tr>
<tr class="separator:gaa952277368fc2024057861071922661f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad2dd5620c4ac7d9dee393f4e38446685"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gad2dd5620c4ac7d9dee393f4e38446685">XHwIcap_IntrGlobalDisable</a>(InstancePtr)</td></tr>
<tr class="memdesc:gad2dd5620c4ac7d9dee393f4e38446685"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro disables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is disabled.  <a href="#gad2dd5620c4ac7d9dee393f4e38446685">More...</a><br/></td></tr>
<tr class="separator:gad2dd5620c4ac7d9dee393f4e38446685"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ea29151eef34461b2a964bba048c22f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga9ea29151eef34461b2a964bba048c22f">XHwIcap_IntrGetStatus</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga9ea29151eef34461b2a964bba048c22f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the interrupt status read from Interrupt Status Register(IPISR).  <a href="#ga9ea29151eef34461b2a964bba048c22f">More...</a><br/></td></tr>
<tr class="separator:ga9ea29151eef34461b2a964bba048c22f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd39ee74d909817a0ecd1d5145f36920"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gadd39ee74d909817a0ecd1d5145f36920">XHwIcap_IntrDisable</a>(InstancePtr, IntrMask)</td></tr>
<tr class="memdesc:gadd39ee74d909817a0ecd1d5145f36920"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro disables the specified interrupts in the Interrupt Enable Register.  <a href="#gadd39ee74d909817a0ecd1d5145f36920">More...</a><br/></td></tr>
<tr class="separator:gadd39ee74d909817a0ecd1d5145f36920"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf5d9b150a34fa3759415531b833f81a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gabf5d9b150a34fa3759415531b833f81a">XHwIcap_IntrEnable</a>(InstancePtr, IntrMask)</td></tr>
<tr class="memdesc:gabf5d9b150a34fa3759415531b833f81a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro enables the specified interrupts in the Interrupt Enable Register.  <a href="#gabf5d9b150a34fa3759415531b833f81a">More...</a><br/></td></tr>
<tr class="separator:gabf5d9b150a34fa3759415531b833f81a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50e8cae31685b6c7e2bb880fd1138209"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga50e8cae31685b6c7e2bb880fd1138209">XHwIcap_IntrGetEnabled</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga50e8cae31685b6c7e2bb880fd1138209"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the interrupt status read from Interrupt Enable Register(IIER).  <a href="#ga50e8cae31685b6c7e2bb880fd1138209">More...</a><br/></td></tr>
<tr class="separator:ga50e8cae31685b6c7e2bb880fd1138209"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga161e6cb1deac088c298c11c6400da295"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga161e6cb1deac088c298c11c6400da295">XHwIcap_IntrClear</a>(InstancePtr, IntrMask)</td></tr>
<tr class="memdesc:ga161e6cb1deac088c298c11c6400da295"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro clears the specified interrupts in the Interrupt Status Register (IPISR).  <a href="#ga161e6cb1deac088c298c11c6400da295">More...</a><br/></td></tr>
<tr class="separator:ga161e6cb1deac088c298c11c6400da295"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada2fee3cdacf928be46488879f32bf8a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gada2fee3cdacf928be46488879f32bf8a">XHwIcap_GetWrFifoVacancy</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, <a class="el" href="group__hwicap.html#ga2d5e8341edaacfbd2e50e6d348ad8131">XHI_WFV_OFFSET</a>)</td></tr>
<tr class="memdesc:gada2fee3cdacf928be46488879f32bf8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the vacancy of the Write FIFO.  <a href="#gada2fee3cdacf928be46488879f32bf8a">More...</a><br/></td></tr>
<tr class="separator:gada2fee3cdacf928be46488879f32bf8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5372c712425f6f8c3cc116a79f29cf3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa5372c712425f6f8c3cc116a79f29cf3">XHwIcap_GetRdFifoOccupancy</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, <a class="el" href="group__hwicap.html#ga9bc6d60763a4589772fbab9611444a76">XHI_RFO_OFFSET</a>)</td></tr>
<tr class="memdesc:gaa5372c712425f6f8c3cc116a79f29cf3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the occupancy of the Read FIFO.  <a href="#gaa5372c712425f6f8c3cc116a79f29cf3">More...</a><br/></td></tr>
<tr class="separator:gaa5372c712425f6f8c3cc116a79f29cf3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4306e4bf6223f5f27a2d971657028f47"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga4306e4bf6223f5f27a2d971657028f47">XHwIcap_Type1Read</a>(Register)</td></tr>
<tr class="memdesc:ga4306e4bf6223f5f27a2d971657028f47"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generates a Type 1 packet header that reads back the requested Configuration register.  <a href="#ga4306e4bf6223f5f27a2d971657028f47">More...</a><br/></td></tr>
<tr class="separator:ga4306e4bf6223f5f27a2d971657028f47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7c6a9a2fa2522cf08f4eda4be3b9a4f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa7c6a9a2fa2522cf08f4eda4be3b9a4f">XHwIcap_Type2Read</a>(Register)&#160;&#160;&#160;( XHI_TYPE_2_READ | (Register &lt;&lt; XHI_REGISTER_SHIFT))</td></tr>
<tr class="memdesc:gaa7c6a9a2fa2522cf08f4eda4be3b9a4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generates a Type 2 packet header that reads back the requested Configuration register.  <a href="#gaa7c6a9a2fa2522cf08f4eda4be3b9a4f">More...</a><br/></td></tr>
<tr class="separator:gaa7c6a9a2fa2522cf08f4eda4be3b9a4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b59b1dac14d84654658e66206861848"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga3b59b1dac14d84654658e66206861848">XHwIcap_Type1Write</a>(Register)</td></tr>
<tr class="memdesc:ga3b59b1dac14d84654658e66206861848"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generates a Type 1 packet header that writes to the requested Configuration register.  <a href="#ga3b59b1dac14d84654658e66206861848">More...</a><br/></td></tr>
<tr class="separator:ga3b59b1dac14d84654658e66206861848"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae26a5e19e76752fd22a6d4af5bf7d52d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gae26a5e19e76752fd22a6d4af5bf7d52d">XHwIcap_Type2Write</a>(Register)</td></tr>
<tr class="memdesc:gae26a5e19e76752fd22a6d4af5bf7d52d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generates a Type 2 packet header that writes to the requested Configuration register.  <a href="#gae26a5e19e76752fd22a6d4af5bf7d52d">More...</a><br/></td></tr>
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<tr class="memitem:ga75a66420e12838cb13d12a5528bbd6e6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga75a66420e12838cb13d12a5528bbd6e6">XHwIcap_SetupFarV5</a>(Top, Block, Row, ColumnAddress, MinorAddress)</td></tr>
<tr class="memdesc:ga75a66420e12838cb13d12a5528bbd6e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generates a Type 1 packet header that is written to the Frame Address Register (FAR).  <a href="#ga75a66420e12838cb13d12a5528bbd6e6">More...</a><br/></td></tr>
<tr class="separator:ga75a66420e12838cb13d12a5528bbd6e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7061e53605486f268a5e2205828d5921"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;XHwIcap_In32((BaseAddress) + (RegOffset))</td></tr>
<tr class="memdesc:ga7061e53605486f268a5e2205828d5921"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read from the specified HwIcap device register.  <a href="#ga7061e53605486f268a5e2205828d5921">More...</a><br/></td></tr>
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<tr class="memitem:ga8abfb8a13021622966d96781cb1a0f86"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>(BaseAddress, RegOffset, RegisterValue)&#160;&#160;&#160;XHwIcap_Out32((BaseAddress) + (RegOffset), (RegisterValue))</td></tr>
<tr class="memdesc:ga8abfb8a13021622966d96781cb1a0f86"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write to the specified HwIcap device register.  <a href="#ga8abfb8a13021622966d96781cb1a0f86">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:gac66fc3c032512dfc47f97bc87d97ca4b"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gac66fc3c032512dfc47f97bc87d97ca4b">XHwIcap_StatusHandler</a> )(void *CallBackRef, u32 StatusEvent, u32 WordCount)</td></tr>
<tr class="memdesc:gac66fc3c032512dfc47f97bc87d97ca4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The handler data type allows the user to define a callback function to handle the asynchronous processing of the HwIcap driver.  <a href="#gac66fc3c032512dfc47f97bc87d97ca4b">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gad497b5129aff666181e85457f1c5f678"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gad497b5129aff666181e85457f1c5f678">XHwIcap_CfgInitialize</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, <a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a> *ConfigPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:gad497b5129aff666181e85457f1c5f678"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes a specific <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.  <a href="#gad497b5129aff666181e85457f1c5f678">More...</a><br/></td></tr>
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<tr class="memitem:gaab446328af0c5b397eeaee15088bf8e8"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, u32 *FrameBuffer, u32 NumWords)</td></tr>
<tr class="memdesc:gaab446328af0c5b397eeaee15088bf8e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes the given user data to the Write FIFO in both the polled mode and the interrupt mode and starts the transfer of the data to the ICAP device.  <a href="#gaab446328af0c5b397eeaee15088bf8e8">More...</a><br/></td></tr>
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<tr class="memitem:ga27e9ac291323ef043303367460b70de0"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, u32 *FrameBuffer, u32 NumWords)</td></tr>
<tr class="memdesc:ga27e9ac291323ef043303367460b70de0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads the specified number of words from the ICAP device in the polled mode.  <a href="#ga27e9ac291323ef043303367460b70de0">More...</a><br/></td></tr>
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<tr class="memitem:ga6c516a5e0cb9f928e591a152cd567dca"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">XHwIcap_Reset</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga6c516a5e0cb9f928e591a152cd567dca"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function forces the software reset of the complete HWICAP device.  <a href="#ga6c516a5e0cb9f928e591a152cd567dca">More...</a><br/></td></tr>
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<tr class="memitem:ga92dbad9de7f4a4e41fcde30fc2ebda1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga92dbad9de7f4a4e41fcde30fc2ebda1c">XHwIcap_FlushFifo</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga92dbad9de7f4a4e41fcde30fc2ebda1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function flushes the FIFOs in the device.  <a href="#ga92dbad9de7f4a4e41fcde30fc2ebda1c">More...</a><br/></td></tr>
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<tr class="memitem:ga2493ca18331cba6eb2162449b7dab66e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga2493ca18331cba6eb2162449b7dab66e">XHwIcap_Abort</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga2493ca18331cba6eb2162449b7dab66e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initiates the Abort Sequence by setting the Abort bit in the control register.  <a href="#ga2493ca18331cba6eb2162449b7dab66e">More...</a><br/></td></tr>
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<tr class="memitem:gadead7aef30c83eb98380b986884b0e6f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gadead7aef30c83eb98380b986884b0e6f">XHwIcap_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:gadead7aef30c83eb98380b986884b0e6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="#gadead7aef30c83eb98380b986884b0e6f">More...</a><br/></td></tr>
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<tr class="memitem:ga7c4b2410acc62af539dac03005668754"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">XHwIcap_CommandDesync</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga7c4b2410acc62af539dac03005668754"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sends a DESYNC command to the ICAP port.  <a href="#ga7c4b2410acc62af539dac03005668754">More...</a><br/></td></tr>
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<tr class="memitem:gaff2a2db509296264ad44270798b4bed2"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaff2a2db509296264ad44270798b4bed2">XHwIcap_CommandCapture</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaff2a2db509296264ad44270798b4bed2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sends a CAPTURE command to the ICAP port.  <a href="#gaff2a2db509296264ad44270798b4bed2">More...</a><br/></td></tr>
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<tr class="memitem:ga305707eb013da39d038183c7f0d8fed9"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, u32 ConfigReg, u32 *RegData)</td></tr>
<tr class="memdesc:ga305707eb013da39d038183c7f0d8fed9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the value of the specified configuration register.  <a href="#ga305707eb013da39d038183c7f0d8fed9">More...</a><br/></td></tr>
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<tr class="memitem:ga0716d6a3c65aabb73344bee9c4c9cfc7"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga0716d6a3c65aabb73344bee9c4c9cfc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Run a self-test on the driver/device.  <a href="#ga0716d6a3c65aabb73344bee9c4c9cfc7">More...</a><br/></td></tr>
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<tr class="memitem:ga9cf1ff1dd1056a11f65a903c47492842"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga9cf1ff1dd1056a11f65a903c47492842"><td class="mdescLeft">&#160;</td><td class="mdescRight">The interrupt handler for HwIcap interrupts.  <a href="#ga9cf1ff1dd1056a11f65a903c47492842">More...</a><br/></td></tr>
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<tr class="memitem:gaa2f2f23cf842c10f443509f8861a194a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa2f2f23cf842c10f443509f8861a194a">XHwIcap_SetInterruptHandler</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, void *CallBackRef, <a class="el" href="group__hwicap.html#gac66fc3c032512dfc47f97bc87d97ca4b">XHwIcap_StatusHandler</a> FuncPtr)</td></tr>
<tr class="memdesc:gaa2f2f23cf842c10f443509f8861a194a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to the higher layer software.  <a href="#gaa2f2f23cf842c10f443509f8861a194a">More...</a><br/></td></tr>
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<tr class="memitem:gafdb7b9947a1e1610a214814c1b19a0a1"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, long Top, long Block, long HClkRow, long MajorFrame, long MinorFrame, u32 *FrameBuffer)</td></tr>
<tr class="memdesc:gafdb7b9947a1e1610a214814c1b19a0a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads one frame from the device and puts it in memory specified by the user.  <a href="#gafdb7b9947a1e1610a214814c1b19a0a1">More...</a><br/></td></tr>
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<tr class="memitem:ga7b2b996ebb5c5268a07d39e9add552dc"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga7b2b996ebb5c5268a07d39e9add552dc">XHwIcap_DeviceWriteFrame</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, long Top, long Block, long HClkRow, long MajorFrame, long MinorFrame, u32 *FrameData)</td></tr>
<tr class="memdesc:ga7b2b996ebb5c5268a07d39e9add552dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes one frame from the specified buffer and puts it in the device (ICAP).  <a href="#ga7b2b996ebb5c5268a07d39e9add552dc">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:gaa020f336dc0dc25e21d127b0c4095df1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa020f336dc0dc25e21d127b0c4095df1">XHwIcap_ConfigTable</a> [XPAR_XHWICAP_NUM_INSTANCES]</td></tr>
<tr class="memdesc:gaa020f336dc0dc25e21d127b0c4095df1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The configuration table for opb_hwicap devices.  <a href="#gaa020f336dc0dc25e21d127b0c4095df1">More...</a><br/></td></tr>
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<tr class="memitem:ga3f53ce899ff994f3f1ccdcc13f3be9d9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga3f53ce899ff994f3f1ccdcc13f3be9d9">XHwIcap_ConfigTable</a> []</td></tr>
<tr class="memdesc:ga3f53ce899ff994f3f1ccdcc13f3be9d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">The configuration table for opb_hwicap devices.  <a href="#ga3f53ce899ff994f3f1ccdcc13f3be9d9">More...</a><br/></td></tr>
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Configuration Type1/Type2 packet headers masks</h2></td></tr>
<tr class="memitem:gafabe3a91aa9fcf77853dba17dec2fe0f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafabe3a91aa9fcf77853dba17dec2fe0f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_TYPE_MASK</b>&#160;&#160;&#160;0x7</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_REGISTER_MASK</b>&#160;&#160;&#160;0x1F</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_OP_MASK</b>&#160;&#160;&#160;0x3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_WORD_COUNT_MASK_TYPE_1</b>&#160;&#160;&#160;0x7FF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_WORD_COUNT_MASK_TYPE_2</b>&#160;&#160;&#160;0x07FFFFFF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_TYPE_SHIFT</b>&#160;&#160;&#160;29</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_REGISTER_SHIFT</b>&#160;&#160;&#160;13</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_OP_SHIFT</b>&#160;&#160;&#160;27</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_TYPE_1</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_TYPE_2</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_OP_WRITE</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_OP_READ</b>&#160;&#160;&#160;1</td></tr>
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Frame Address Register mask(s)</h2></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_BLOCK_MASK</b>&#160;&#160;&#160;0x7</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_TOP_BOTTOM_MASK</b>&#160;&#160;&#160;0x1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_ROW_ADDR_MASK</b>&#160;&#160;&#160;0x1F</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_COLUMN_ADDR_MASK</b>&#160;&#160;&#160;0x3FF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_MINOR_ADDR_MASK</b>&#160;&#160;&#160;0x7F</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_BLOCK_SHIFT</b>&#160;&#160;&#160;23</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_TOP_BOTTOM_SHIFT</b>&#160;&#160;&#160;22</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_ROW_ADDR_SHIFT</b>&#160;&#160;&#160;17</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_COLUMN_ADDR_SHIFT</b>&#160;&#160;&#160;7</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHI_FAR_MINOR_ADDR_SHIFT</b>&#160;&#160;&#160;0</td></tr>
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<tr class="memitem:ga43689d0fc1f26add1ff96f3713669b7d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga43689d0fc1f26add1ff96f3713669b7d">XHI_FAR_CLB_BLOCK</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga43689d0fc1f26add1ff96f3713669b7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">CLB/IO/CLK Block.  <a href="#ga43689d0fc1f26add1ff96f3713669b7d">More...</a><br/></td></tr>
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<tr class="memitem:ga30e3da82bc2b3dc0086618a0ad8935d6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga30e3da82bc2b3dc0086618a0ad8935d6">XHI_FAR_BRAM_BLOCK</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga30e3da82bc2b3dc0086618a0ad8935d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block RAM interconnect.  <a href="#ga30e3da82bc2b3dc0086618a0ad8935d6">More...</a><br/></td></tr>
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<tr class="memitem:gaa5780774a0fc1529e24e9c2776d7a0d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa5780774a0fc1529e24e9c2776d7a0d8">XHI_FAR_CFG_CLB_BLOCK</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:gaa5780774a0fc1529e24e9c2776d7a0d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">CFG CLB Block.  <a href="#gaa5780774a0fc1529e24e9c2776d7a0d8">More...</a><br/></td></tr>
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Register Map</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp092729737d14686054aa21531a3582c6"></a>Register offsets for the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> device. </p>
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<tr class="memitem:gacc55662e7438a63d17100c391701bca0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gacc55662e7438a63d17100c391701bca0">XHI_GIER_OFFSET</a>&#160;&#160;&#160;0x1C</td></tr>
<tr class="memdesc:gacc55662e7438a63d17100c391701bca0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device Global Interrupt Enable Reg.  <a href="#gacc55662e7438a63d17100c391701bca0">More...</a><br/></td></tr>
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<tr class="memitem:ga4ff2b0721655b2764bff81449b368478"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga4ff2b0721655b2764bff81449b368478">XHI_IPISR_OFFSET</a>&#160;&#160;&#160;0x20</td></tr>
<tr class="memdesc:ga4ff2b0721655b2764bff81449b368478"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Status Register.  <a href="#ga4ff2b0721655b2764bff81449b368478">More...</a><br/></td></tr>
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<tr class="memitem:ga8723cf72ecf20356371e6f6d2ce55543"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a>&#160;&#160;&#160;0x28</td></tr>
<tr class="memdesc:ga8723cf72ecf20356371e6f6d2ce55543"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Enable Register.  <a href="#ga8723cf72ecf20356371e6f6d2ce55543">More...</a><br/></td></tr>
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<tr class="memitem:ga9f823f835a5a4cc52bb93dd31f88c62c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga9f823f835a5a4cc52bb93dd31f88c62c">XHI_WF_OFFSET</a>&#160;&#160;&#160;0x100</td></tr>
<tr class="memdesc:ga9f823f835a5a4cc52bb93dd31f88c62c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write FIFO.  <a href="#ga9f823f835a5a4cc52bb93dd31f88c62c">More...</a><br/></td></tr>
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<tr class="memitem:ga880c301214287dc0231e142662bba24c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga880c301214287dc0231e142662bba24c">XHI_RF_OFFSET</a>&#160;&#160;&#160;0x104</td></tr>
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<tr class="memitem:ga61e8525d9e209cad45122af264f276f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga61e8525d9e209cad45122af264f276f0">XHI_SZ_OFFSET</a>&#160;&#160;&#160;0x108</td></tr>
<tr class="memdesc:ga61e8525d9e209cad45122af264f276f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Size Register.  <a href="#ga61e8525d9e209cad45122af264f276f0">More...</a><br/></td></tr>
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<tr class="memitem:gad7d94ec59e14347684d309b0b6406ab2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>&#160;&#160;&#160;0x10C</td></tr>
<tr class="memdesc:gad7d94ec59e14347684d309b0b6406ab2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control Register.  <a href="#gad7d94ec59e14347684d309b0b6406ab2">More...</a><br/></td></tr>
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<tr class="memitem:gad582c2c3fe5aa1d83b43dc7a0d243da8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gad582c2c3fe5aa1d83b43dc7a0d243da8">XHI_SR_OFFSET</a>&#160;&#160;&#160;0x110</td></tr>
<tr class="memdesc:gad582c2c3fe5aa1d83b43dc7a0d243da8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status Register.  <a href="#gad582c2c3fe5aa1d83b43dc7a0d243da8">More...</a><br/></td></tr>
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<tr class="memitem:ga2d5e8341edaacfbd2e50e6d348ad8131"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga2d5e8341edaacfbd2e50e6d348ad8131">XHI_WFV_OFFSET</a>&#160;&#160;&#160;0x114</td></tr>
<tr class="memdesc:ga2d5e8341edaacfbd2e50e6d348ad8131"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write FIFO Vacancy Register.  <a href="#ga2d5e8341edaacfbd2e50e6d348ad8131">More...</a><br/></td></tr>
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<tr class="memitem:ga9bc6d60763a4589772fbab9611444a76"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga9bc6d60763a4589772fbab9611444a76">XHI_RFO_OFFSET</a>&#160;&#160;&#160;0x118</td></tr>
<tr class="memdesc:ga9bc6d60763a4589772fbab9611444a76"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read FIFO Occupancy Register.  <a href="#ga9bc6d60763a4589772fbab9611444a76">More...</a><br/></td></tr>
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Device Global Interrupt Enable Register (GIER) bit definitions</h2></td></tr>
<tr class="memitem:ga312f920dfd13871dfc397bb734e81542"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga312f920dfd13871dfc397bb734e81542">XHI_GIER_GIE_MASK</a>&#160;&#160;&#160;0x80000000</td></tr>
<tr class="memdesc:ga312f920dfd13871dfc397bb734e81542"><td class="mdescLeft">&#160;</td><td class="mdescRight">Global Interrupt enable Mask.  <a href="#ga312f920dfd13871dfc397bb734e81542">More...</a><br/></td></tr>
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HwIcap Device Interrupt Status/Enable Registers</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp2b951a0cbd739a92d41a375323eeb185"></a><b> Interrupt Status Register (IPISR) </b></p>
<p>This register holds the interrupt status flags for the device. These bits are toggle on write.</p>
<p><b> Interrupt Enable Register (IPIER) </b></p>
<p>This register is used to enable interrupt sources for the device. Writing a '1' to a bit in this register enables the corresponding Interrupt. Writing a '0' to a bit in this register disables the corresponding Interrupt.</p>
<p>IPISR/IPIER registers have the same bit definitions and are only defined once. </p>
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<tr class="memitem:gae940123f31edca885cce128466074fbd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gae940123f31edca885cce128466074fbd">XHI_IPIXR_RFULL_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:gae940123f31edca885cce128466074fbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read FIFO Full.  <a href="#gae940123f31edca885cce128466074fbd">More...</a><br/></td></tr>
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<tr class="memitem:ga47f9b5b4f4e16c810064acf5ce674575"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga47f9b5b4f4e16c810064acf5ce674575">XHI_IPIXR_WEMPTY_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga47f9b5b4f4e16c810064acf5ce674575"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write FIFO Empty.  <a href="#ga47f9b5b4f4e16c810064acf5ce674575">More...</a><br/></td></tr>
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<tr class="memitem:gae64834b12bee384ff441cf4ca68b060b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gae64834b12bee384ff441cf4ca68b060b">XHI_IPIXR_RDP_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gae64834b12bee384ff441cf4ca68b060b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read FIFO half full.  <a href="#gae64834b12bee384ff441cf4ca68b060b">More...</a><br/></td></tr>
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<tr class="memitem:ga3d51a2ca2954770e68e8304c6d45a797"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga3d51a2ca2954770e68e8304c6d45a797">XHI_IPIXR_WRP_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga3d51a2ca2954770e68e8304c6d45a797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write FIFO half full.  <a href="#ga3d51a2ca2954770e68e8304c6d45a797">More...</a><br/></td></tr>
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<tr class="memitem:ga796c30e8bebadbe5c18ce0af9b10d30a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a>&#160;&#160;&#160;0x0000000F</td></tr>
<tr class="memdesc:ga796c30e8bebadbe5c18ce0af9b10d30a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask of all interrupts.  <a href="#ga796c30e8bebadbe5c18ce0af9b10d30a">More...</a><br/></td></tr>
<tr class="separator:ga796c30e8bebadbe5c18ce0af9b10d30a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Control Register (CR)</h2></td></tr>
<tr class="memitem:ga776ac9dc4020f86bab9c5b1fd9221dd1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga776ac9dc4020f86bab9c5b1fd9221dd1">XHI_CR_SW_ABORT_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga776ac9dc4020f86bab9c5b1fd9221dd1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Abort current ICAP Read/Write.  <a href="#ga776ac9dc4020f86bab9c5b1fd9221dd1">More...</a><br/></td></tr>
<tr class="separator:ga776ac9dc4020f86bab9c5b1fd9221dd1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50e289c4313fa405cf086df7ce901a1b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga50e289c4313fa405cf086df7ce901a1b">XHI_CR_SW_RESET_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga50e289c4313fa405cf086df7ce901a1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">SW Reset Mask.  <a href="#ga50e289c4313fa405cf086df7ce901a1b">More...</a><br/></td></tr>
<tr class="separator:ga50e289c4313fa405cf086df7ce901a1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd19f105fe87bc06e8970c46f2f23508"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gafd19f105fe87bc06e8970c46f2f23508">XHI_CR_FIFO_CLR_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:gafd19f105fe87bc06e8970c46f2f23508"><td class="mdescLeft">&#160;</td><td class="mdescRight">FIFO Clear Mask.  <a href="#gafd19f105fe87bc06e8970c46f2f23508">More...</a><br/></td></tr>
<tr class="separator:gafd19f105fe87bc06e8970c46f2f23508"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f79a1af0d4909378342da1723568653"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga5f79a1af0d4909378342da1723568653">XHI_CR_READ_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga5f79a1af0d4909378342da1723568653"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read from ICAP to FIFO.  <a href="#ga5f79a1af0d4909378342da1723568653">More...</a><br/></td></tr>
<tr class="separator:ga5f79a1af0d4909378342da1723568653"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaef1da3487a4b5b56304445dd5892855b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaef1da3487a4b5b56304445dd5892855b">XHI_CR_WRITE_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:gaef1da3487a4b5b56304445dd5892855b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write from FIFO to ICAP.  <a href="#gaef1da3487a4b5b56304445dd5892855b">More...</a><br/></td></tr>
<tr class="separator:gaef1da3487a4b5b56304445dd5892855b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Status Register (SR)</h2></td></tr>
<tr class="memitem:ga70dd605f5c61f0d4dca8f7d2c7818b96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga70dd605f5c61f0d4dca8f7d2c7818b96">XHI_SR_CFGERR_N_MASK</a>&#160;&#160;&#160;0x00000100</td></tr>
<tr class="memdesc:ga70dd605f5c61f0d4dca8f7d2c7818b96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Config Error Mask.  <a href="#ga70dd605f5c61f0d4dca8f7d2c7818b96">More...</a><br/></td></tr>
<tr class="separator:ga70dd605f5c61f0d4dca8f7d2c7818b96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab20344d8715b57430612cbee984dc22e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gab20344d8715b57430612cbee984dc22e">XHI_SR_DALIGN_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:gab20344d8715b57430612cbee984dc22e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Alignment Mask.  <a href="#gab20344d8715b57430612cbee984dc22e">More...</a><br/></td></tr>
<tr class="separator:gab20344d8715b57430612cbee984dc22e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd2efa3b995368421322945fcf4a0193"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gabd2efa3b995368421322945fcf4a0193">XHI_SR_RIP_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:gabd2efa3b995368421322945fcf4a0193"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read back Mask.  <a href="#gabd2efa3b995368421322945fcf4a0193">More...</a><br/></td></tr>
<tr class="separator:gabd2efa3b995368421322945fcf4a0193"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4e0a65580d8d9e4ea6a0df1a65c5308c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga4e0a65580d8d9e4ea6a0df1a65c5308c">XHI_SR_IN_ABORT_N_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga4e0a65580d8d9e4ea6a0df1a65c5308c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select Map Abort Mask.  <a href="#ga4e0a65580d8d9e4ea6a0df1a65c5308c">More...</a><br/></td></tr>
<tr class="separator:ga4e0a65580d8d9e4ea6a0df1a65c5308c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f6dfed1a6cda2d244f7b58ccf734eb3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga5f6dfed1a6cda2d244f7b58ccf734eb3">XHI_SR_DONE_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga5f6dfed1a6cda2d244f7b58ccf734eb3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Done bit Mask.  <a href="#ga5f6dfed1a6cda2d244f7b58ccf734eb3">More...</a><br/></td></tr>
<tr class="separator:ga5f6dfed1a6cda2d244f7b58ccf734eb3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b189772fde4c6ca3bc0c20b7b1fc3af"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga4b189772fde4c6ca3bc0c20b7b1fc3af">XHI_SR_EOS_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga4b189772fde4c6ca3bc0c20b7b1fc3af"><td class="mdescLeft">&#160;</td><td class="mdescRight">EOS bit Mask.  <a href="#ga4b189772fde4c6ca3bc0c20b7b1fc3af">More...</a><br/></td></tr>
<tr class="separator:ga4b189772fde4c6ca3bc0c20b7b1fc3af"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga52f19423a8a68df00cec1517428d8cf7"></a>
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          <td class="memname">#define PCAP_CR_OFFSET&#160;&#160;&#160;0xFFCA3008</td>
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<p>PCAP CR Register. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#gad497b5129aff666181e85457f1c5f678">XHwIcap_CfgInitialize()</a>.</p>

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</div>
<a class="anchor" id="gafd19f105fe87bc06e8970c46f2f23508"></a>
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          <td class="memname">#define XHI_CR_FIFO_CLR_MASK&#160;&#160;&#160;0x00000004</td>
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<p>FIFO Clear Mask. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga92dbad9de7f4a4e41fcde30fc2ebda1c">XHwIcap_FlushFifo()</a>.</p>

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</div>
<a class="anchor" id="gad7d94ec59e14347684d309b0b6406ab2"></a>
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          <td class="memname">#define XHI_CR_OFFSET&#160;&#160;&#160;0x10C</td>
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<p>Control Register. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>, <a class="el" href="group__hwicap.html#ga2493ca18331cba6eb2162449b7dab66e">XHwIcap_Abort()</a>, <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, <a class="el" href="group__hwicap.html#ga92dbad9de7f4a4e41fcde30fc2ebda1c">XHwIcap_FlushFifo()</a>, <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>, and <a class="el" href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">XHwIcap_Reset()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5f79a1af0d4909378342da1723568653"></a>
<div class="memitem">
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          <td class="memname">#define XHI_CR_READ_MASK&#160;&#160;&#160;0x00000002</td>
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<p>Read from ICAP to FIFO. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>, and <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>.</p>

</div>
</div>
<a class="anchor" id="ga776ac9dc4020f86bab9c5b1fd9221dd1"></a>
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          <td class="memname">#define XHI_CR_SW_ABORT_MASK&#160;&#160;&#160;0x00000010</td>
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<p>Abort current ICAP Read/Write. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga2493ca18331cba6eb2162449b7dab66e">XHwIcap_Abort()</a>.</p>

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</div>
<a class="anchor" id="ga50e289c4313fa405cf086df7ce901a1b"></a>
<div class="memitem">
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          <td class="memname">#define XHI_CR_SW_RESET_MASK&#160;&#160;&#160;0x00000008</td>
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<p>SW Reset Mask. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">XHwIcap_Reset()</a>.</p>

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</div>
<a class="anchor" id="gaef1da3487a4b5b56304445dd5892855b"></a>
<div class="memitem">
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          <td class="memname">#define XHI_CR_WRITE_MASK&#160;&#160;&#160;0x00000001</td>
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<p>Write from FIFO to ICAP. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>.</p>

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</div>
<a class="anchor" id="ga30e3da82bc2b3dc0086618a0ad8935d6"></a>
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          <td class="memname">#define XHI_FAR_BRAM_BLOCK&#160;&#160;&#160;1</td>
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<p>Block RAM interconnect. </p>

</div>
</div>
<a class="anchor" id="gaa5780774a0fc1529e24e9c2776d7a0d8"></a>
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          <td class="memname">#define XHI_FAR_CFG_CLB_BLOCK&#160;&#160;&#160;2</td>
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<p>CFG CLB Block. </p>

</div>
</div>
<a class="anchor" id="ga43689d0fc1f26add1ff96f3713669b7d"></a>
<div class="memitem">
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          <td class="memname">#define XHI_FAR_CLB_BLOCK&#160;&#160;&#160;0</td>
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<p>CLB/IO/CLK Block. </p>

</div>
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<a class="anchor" id="ga312f920dfd13871dfc397bb734e81542"></a>
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          <td class="memname">#define XHI_GIER_GIE_MASK&#160;&#160;&#160;0x80000000</td>
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<p>Global Interrupt enable Mask. </p>

</div>
</div>
<a class="anchor" id="gacc55662e7438a63d17100c391701bca0"></a>
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          <td class="memname">#define XHI_GIER_OFFSET&#160;&#160;&#160;0x1C</td>
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<p>Device Global Interrupt Enable Reg. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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</div>
<a class="anchor" id="ga8723cf72ecf20356371e6f6d2ce55543"></a>
<div class="memitem">
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          <td class="memname">#define XHI_IPIER_OFFSET&#160;&#160;&#160;0x28</td>
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<p>Interrupt Enable Register. </p>

</div>
</div>
<a class="anchor" id="ga4ff2b0721655b2764bff81449b368478"></a>
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          <td class="memname">#define XHI_IPISR_OFFSET&#160;&#160;&#160;0x20</td>
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<p>Interrupt Status Register. </p>

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</div>
<a class="anchor" id="ga796c30e8bebadbe5c18ce0af9b10d30a"></a>
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          <td class="memname">#define XHI_IPIXR_ALL_MASK&#160;&#160;&#160;0x0000000F</td>
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<p>Mask of all interrupts. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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</div>
<a class="anchor" id="gae64834b12bee384ff441cf4ca68b060b"></a>
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          <td class="memname">#define XHI_IPIXR_RDP_MASK&#160;&#160;&#160;0x00000002</td>
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<p>Read FIFO half full. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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</div>
<a class="anchor" id="gae940123f31edca885cce128466074fbd"></a>
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          <td class="memname">#define XHI_IPIXR_RFULL_MASK&#160;&#160;&#160;0x00000008</td>
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<p>Read FIFO Full. </p>

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</div>
<a class="anchor" id="ga47f9b5b4f4e16c810064acf5ce674575"></a>
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          <td class="memname">#define XHI_IPIXR_WEMPTY_MASK&#160;&#160;&#160;0x00000004</td>
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<p>Write FIFO Empty. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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</div>
<a class="anchor" id="ga3d51a2ca2954770e68e8304c6d45a797"></a>
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          <td class="memname">#define XHI_IPIXR_WRP_MASK&#160;&#160;&#160;0x00000001</td>
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<p>Write FIFO half full. </p>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>, and <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler()</a>.</p>

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</div>
<a class="anchor" id="ga880c301214287dc0231e142662bba24c"></a>
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          <td class="memname">#define XHI_RF_OFFSET&#160;&#160;&#160;0x104</td>
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<p>Read FIFO. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>.</p>

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</div>
<a class="anchor" id="ga9bc6d60763a4589772fbab9611444a76"></a>
<div class="memitem">
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          <td class="memname">#define XHI_RFO_OFFSET&#160;&#160;&#160;0x118</td>
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<p>Read FIFO Occupancy Register. </p>

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</div>
<a class="anchor" id="ga70dd605f5c61f0d4dca8f7d2c7818b96"></a>
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          <td class="memname">#define XHI_SR_CFGERR_N_MASK&#160;&#160;&#160;0x00000100</td>
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<p>Config Error Mask. </p>

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<a class="anchor" id="gab20344d8715b57430612cbee984dc22e"></a>
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          <td class="memname">#define XHI_SR_DALIGN_MASK&#160;&#160;&#160;0x00000080</td>
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<p>Data Alignment Mask. </p>

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          <td class="memname">#define XHI_SR_DONE_MASK&#160;&#160;&#160;0x00000001</td>
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<p>Done bit Mask. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>.</p>

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          <td class="memname">#define XHI_SR_EOS_MASK&#160;&#160;&#160;0x00000004</td>
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<p>EOS bit Mask. </p>

<p>Referenced by <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>.</p>

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          <td class="memname">#define XHI_SR_IN_ABORT_N_MASK&#160;&#160;&#160;0x00000020</td>
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<p>Select Map Abort Mask. </p>

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          <td class="memname">#define XHI_SR_OFFSET&#160;&#160;&#160;0x110</td>
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<p>Status Register. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>, and <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>.</p>

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          <td class="memname">#define XHI_SR_RIP_MASK&#160;&#160;&#160;0x00000040</td>
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<p>Read back Mask. </p>

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          <td class="memname">#define XHI_SZ_OFFSET&#160;&#160;&#160;0x108</td>
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<p>Size Register. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>.</p>

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          <td class="memname">#define XHI_WF_OFFSET&#160;&#160;&#160;0x100</td>
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<p>Write FIFO. </p>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>.</p>

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          <td class="memname">#define XHI_WFV_OFFSET&#160;&#160;&#160;0x114</td>
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<p>Write FIFO Vacancy Register. </p>

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          <td class="memname">#define XHwIcap_FifoRead</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#ga880c301214287dc0231e142662bba24c">XHI_RF_OFFSET</a>))</td>
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<p>Read data from the Read FIFO. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The 32-bit Data read from the FIFO.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style Signature: u32 <a class="el" href="group__hwicap.html#gab24c5878ebb17d6bb12e6e6f00a70ccc" title="Read data from the Read FIFO. ">XHwIcap_FifoRead(XHwIcap *InstancePtr)</a>; </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>.</p>

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          <td class="memname">#define XHwIcap_FifoWrite</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<b>Value:</b><div class="fragment"><div class="line">(<a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress),    \</div>
<div class="line">                          <a class="code" href="group__hwicap.html#ga9f823f835a5a4cc52bb93dd31f88c62c">XHI_WF_OFFSET</a>, (Data)))</div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga9f823f835a5a4cc52bb93dd31f88c62c"><div class="ttname"><a href="group__hwicap.html#ga9f823f835a5a4cc52bb93dd31f88c62c">XHI_WF_OFFSET</a></div><div class="ttdeci">#define XHI_WF_OFFSET</div><div class="ttdoc">Write FIFO. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:68</div></div>
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<p>Write data to the Write FIFO. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32-bit value to be written to the FIFO.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style Signature: void <a class="el" href="group__hwicap.html#ga578d555615b032cd9675c91f60dfb2bd" title="Write data to the Write FIFO. ">XHwIcap_FifoWrite(XHwIcap *InstancePtr, u32 Data)</a>; </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler()</a>.</p>

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          <td class="memname">#define XHwIcap_GetControlReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>))</td>
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<p>Get the contents of the Control register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the Control register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>u32 <a class="el" href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f" title="Get the contents of the Control register. ">XHwIcap_GetControlReg(XHwIcap *InstancePtr)</a>; </dd></dl>

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          <td class="memname">#define XHwIcap_GetRdFifoOccupancy</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, <a class="el" href="group__hwicap.html#ga9bc6d60763a4589772fbab9611444a76">XHI_RFO_OFFSET</a>)</td>
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<p>This macro returns the occupancy of the Read FIFO. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The contents read from the Read FIFO Occupancy Register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__hwicap.html#gaa5372c712425f6f8c3cc116a79f29cf3" title="This macro returns the occupancy of the Read FIFO. ">XHwIcap_GetRdFifoOccupancy(InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>.</p>

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          <td class="memname">#define XHwIcap_GetStatusReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#gad582c2c3fe5aa1d83b43dc7a0d243da8">XHI_SR_OFFSET</a>))</td>
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<p>Get the contents of the status register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the status register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>u32 <a class="el" href="group__hwicap.html#ga656dcfd3edf2dd7e5733af4db36bf69c" title="Get the contents of the status register. ">XHwIcap_GetStatusReg(XHwIcap *InstancePtr)</a>; </dd></dl>

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          <td class="memname">#define XHwIcap_GetWrFifoVacancy</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, <a class="el" href="group__hwicap.html#ga2d5e8341edaacfbd2e50e6d348ad8131">XHI_WFV_OFFSET</a>)</td>
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<p>This macro returns the vacancy of the Write FIFO. </p>
<p>This indicates the number of words that can be written to the Write FIFO before it becomes full.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The contents read from the Write FIFO Vacancy Register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__hwicap.html#gada2fee3cdacf928be46488879f32bf8a" title="This macro returns the vacancy of the Write FIFO. ">XHwIcap_GetWrFifoVacancy(InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler()</a>.</p>

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          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">IntrMask&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress,       \</div>
<div class="line">                         <a class="code" href="group__hwicap.html#ga4ff2b0721655b2764bff81449b368478">XHI_IPISR_OFFSET</a>, \</div>
<div class="line">                         <a class="code" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, \</div>
<div class="line">                                         <a class="code" href="group__hwicap.html#ga4ff2b0721655b2764bff81449b368478">XHI_IPISR_OFFSET</a>) | ((IntrMask) &amp; <a class="code" href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a>))</div>
<div class="ttc" id="group__hwicap_html_ga4ff2b0721655b2764bff81449b368478"><div class="ttname"><a href="group__hwicap.html#ga4ff2b0721655b2764bff81449b368478">XHI_IPISR_OFFSET</a></div><div class="ttdeci">#define XHI_IPISR_OFFSET</div><div class="ttdoc">Interrupt Status Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:66</div></div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga7061e53605486f268a5e2205828d5921"><div class="ttname"><a href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a></div><div class="ttdeci">#define XHwIcap_ReadReg(BaseAddress, RegOffset)</div><div class="ttdoc">Read from the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:161</div></div>
<div class="ttc" id="group__hwicap_html_ga796c30e8bebadbe5c18ce0af9b10d30a"><div class="ttname"><a href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a></div><div class="ttdeci">#define XHI_IPIXR_ALL_MASK</div><div class="ttdoc">Mask of all interrupts. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:108</div></div>
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<p>This macro clears the specified interrupts in the Interrupt Status Register (IPISR). </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance. </td></tr>
    <tr><td class="paramname">IntrMask</td><td>contains the interrupts to be cleared.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Signature: void XHwIcap_DisableIntr(XHwIcap *InstancePtr, u32 IntrMask) </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler()</a>.</p>

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          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">IntrMask&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress,       \</div>
<div class="line">                         <a class="code" href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a>, \</div>
<div class="line">                         <a class="code" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, \</div>
<div class="line">                                         <a class="code" href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a>) &amp; (~ (IntrMask &amp; <a class="code" href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a>)));\</div>
<div class="line">        (InstancePtr)-&gt;IsPolled = TRUE;</div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga8723cf72ecf20356371e6f6d2ce55543"><div class="ttname"><a href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a></div><div class="ttdeci">#define XHI_IPIER_OFFSET</div><div class="ttdoc">Interrupt Enable Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:67</div></div>
<div class="ttc" id="group__hwicap_html_ga7061e53605486f268a5e2205828d5921"><div class="ttname"><a href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a></div><div class="ttdeci">#define XHwIcap_ReadReg(BaseAddress, RegOffset)</div><div class="ttdoc">Read from the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:161</div></div>
<div class="ttc" id="group__hwicap_html_ga796c30e8bebadbe5c18ce0af9b10d30a"><div class="ttname"><a href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a></div><div class="ttdeci">#define XHI_IPIXR_ALL_MASK</div><div class="ttdoc">Mask of all interrupts. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:108</div></div>
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<p>This macro disables the specified interrupts in the Interrupt Enable Register. </p>
<p>It is non-destructive in that the register is read and only the interrupts specified is changed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance. </td></tr>
    <tr><td class="paramname">IntrMask</td><td>is the bit-mask of the interrupts to be disabled. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XHI_IPIXR_*_MASK bits defined in <a class="el" href="xhwicap__l_8h.html">xhwicap_l.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Signature: void <a class="el" href="group__hwicap.html#gadd39ee74d909817a0ecd1d5145f36920" title="This macro disables the specified interrupts in the Interrupt Enable Register. ">XHwIcap_IntrDisable(XHwIcap *InstancePtr, u32 IntrMask)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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          <td class="memname">#define XHwIcap_IntrEnable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">IntrMask&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress,       \</div>
<div class="line">                         <a class="code" href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a>, \</div>
<div class="line">                         (<a class="code" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, \</div>
<div class="line">                                          <a class="code" href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a>) | ((IntrMask) &amp; <a class="code" href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a>))); \</div>
<div class="line">        (InstancePtr)-&gt;IsPolled = FALSE;</div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga8723cf72ecf20356371e6f6d2ce55543"><div class="ttname"><a href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a></div><div class="ttdeci">#define XHI_IPIER_OFFSET</div><div class="ttdoc">Interrupt Enable Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:67</div></div>
<div class="ttc" id="group__hwicap_html_ga7061e53605486f268a5e2205828d5921"><div class="ttname"><a href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a></div><div class="ttdeci">#define XHwIcap_ReadReg(BaseAddress, RegOffset)</div><div class="ttdoc">Read from the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:161</div></div>
<div class="ttc" id="group__hwicap_html_ga796c30e8bebadbe5c18ce0af9b10d30a"><div class="ttname"><a href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a></div><div class="ttdeci">#define XHI_IPIXR_ALL_MASK</div><div class="ttdoc">Mask of all interrupts. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:108</div></div>
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<p>This macro enables the specified interrupts in the Interrupt Enable Register. </p>
<p>It is non-destructive in that the register is read and only the interrupts specified is changed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance. </td></tr>
    <tr><td class="paramname">IntrMask</td><td>is the bit-mask of the interrupts to be enabled. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XHI_IPIXR_*_MASK bits defined in <a class="el" href="xhwicap__l_8h.html">xhwicap_l.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Signature: void <a class="el" href="group__hwicap.html#gabf5d9b150a34fa3759415531b833f81a" title="This macro enables the specified interrupts in the Interrupt Enable Register. ">XHwIcap_IntrEnable(XHwIcap *InstancePtr, u32 IntrMask)</a> </dd></dl>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>, and <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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          <td class="memname">#define XHwIcap_IntrGetEnabled</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress,        \</div>
<div class="line">                        <a class="code" href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a>)</div>
<div class="ttc" id="group__hwicap_html_ga8723cf72ecf20356371e6f6d2ce55543"><div class="ttname"><a href="group__hwicap.html#ga8723cf72ecf20356371e6f6d2ce55543">XHI_IPIER_OFFSET</a></div><div class="ttdeci">#define XHI_IPIER_OFFSET</div><div class="ttdoc">Interrupt Enable Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:67</div></div>
<div class="ttc" id="group__hwicap_html_ga7061e53605486f268a5e2205828d5921"><div class="ttname"><a href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a></div><div class="ttdeci">#define XHwIcap_ReadReg(BaseAddress, RegOffset)</div><div class="ttdoc">Read from the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:161</div></div>
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<p>This macro returns the interrupt status read from Interrupt Enable Register(IIER). </p>
<p>Use the XHI_IPIXR_* constants defined in <a class="el" href="xhwicap__l_8h.html">xhwicap_l.h</a> to interpret the returned value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The contents read from the Interrupt Enable Register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__hwicap.html#ga50e8cae31685b6c7e2bb880fd1138209" title="This macro returns the interrupt status read from Interrupt Enable Register(IIER). ">XHwIcap_IntrGetEnabled(InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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          <td class="memname">#define XHwIcap_IntrGetStatus</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress,        \</div>
<div class="line">                        <a class="code" href="group__hwicap.html#ga4ff2b0721655b2764bff81449b368478">XHI_IPISR_OFFSET</a>)</div>
<div class="ttc" id="group__hwicap_html_ga4ff2b0721655b2764bff81449b368478"><div class="ttname"><a href="group__hwicap.html#ga4ff2b0721655b2764bff81449b368478">XHI_IPISR_OFFSET</a></div><div class="ttdeci">#define XHI_IPISR_OFFSET</div><div class="ttdoc">Interrupt Status Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:66</div></div>
<div class="ttc" id="group__hwicap_html_ga7061e53605486f268a5e2205828d5921"><div class="ttname"><a href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a></div><div class="ttdeci">#define XHwIcap_ReadReg(BaseAddress, RegOffset)</div><div class="ttdoc">Read from the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:161</div></div>
</div><!-- fragment -->
<p>This macro returns the interrupt status read from Interrupt Status Register(IPISR). </p>
<p>Use the XHI_IPIXR_* constants defined in <a class="el" href="xhwicap__l_8h.html">xhwicap_l.h</a> to interpret the returned value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The contents read from the Interrupt Status Register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__hwicap.html#ga9ea29151eef34461b2a964bba048c22f" title="This macro returns the interrupt status read from Interrupt Status Register(IPISR). ">XHwIcap_IntrGetStatus(InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler()</a>.</p>

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          <td class="memname">#define XHwIcap_IntrGlobalDisable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress,       \</div>
<div class="line">                         <a class="code" href="group__hwicap.html#gacc55662e7438a63d17100c391701bca0">XHI_GIER_OFFSET</a>, 0x0)</div>
<div class="ttc" id="group__hwicap_html_gacc55662e7438a63d17100c391701bca0"><div class="ttname"><a href="group__hwicap.html#gacc55662e7438a63d17100c391701bca0">XHI_GIER_OFFSET</a></div><div class="ttdeci">#define XHI_GIER_OFFSET</div><div class="ttdoc">Device Global Interrupt Enable Reg. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:65</div></div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
</div><!-- fragment -->
<p>This macro disables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is disabled. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void <a class="el" href="group__hwicap.html#gad2dd5620c4ac7d9dee393f4e38446685" title="This macro disables the global interrupt in the Global Interrupt Enable Register (GIER) so that the i...">XHwIcap_IntrGlobalDisable(InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler()</a>, and <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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          <td class="memname">#define XHwIcap_IntrGlobalEnable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress,       \</div>
<div class="line">                         <a class="code" href="group__hwicap.html#gacc55662e7438a63d17100c391701bca0">XHI_GIER_OFFSET</a>, <a class="code" href="group__hwicap.html#ga312f920dfd13871dfc397bb734e81542">XHI_GIER_GIE_MASK</a>)</div>
<div class="ttc" id="group__hwicap_html_gacc55662e7438a63d17100c391701bca0"><div class="ttname"><a href="group__hwicap.html#gacc55662e7438a63d17100c391701bca0">XHI_GIER_OFFSET</a></div><div class="ttdeci">#define XHI_GIER_OFFSET</div><div class="ttdoc">Device Global Interrupt Enable Reg. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:65</div></div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga312f920dfd13871dfc397bb734e81542"><div class="ttname"><a href="group__hwicap.html#ga312f920dfd13871dfc397bb734e81542">XHI_GIER_GIE_MASK</a></div><div class="ttdeci">#define XHI_GIER_GIE_MASK</div><div class="ttdoc">Global Interrupt enable Mask. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:83</div></div>
</div><!-- fragment -->
<p>This macro enables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is enabled. </p>
<p>Interrupts enabled using <a class="el" href="group__hwicap.html#gabf5d9b150a34fa3759415531b833f81a" title="This macro enables the specified interrupts in the Interrupt Enable Register. ">XHwIcap_IntrEnable()</a> will not occur until the global interrupt enable bit is set by using this macro.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HwIcap instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void <a class="el" href="group__hwicap.html#gaa952277368fc2024057861071922661f" title="This macro enables the global interrupt in the Global Interrupt Enable Register (GIER) so that the in...">XHwIcap_IntrGlobalEnable(InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>.</p>

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          <td class="memname">#define XHwIcap_IsDeviceBusy</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">((<a class="code" href="group__hwicap.html#ga656dcfd3edf2dd7e5733af4db36bf69c">XHwIcap_GetStatusReg</a>(InstancePtr) &amp; <a class="code" href="group__hwicap.html#ga5f6dfed1a6cda2d244f7b58ccf734eb3">XHI_SR_DONE_MASK</a>) ? \</div>
<div class="line">         FALSE : TRUE)</div>
<div class="ttc" id="group__hwicap_html_ga656dcfd3edf2dd7e5733af4db36bf69c"><div class="ttname"><a href="group__hwicap.html#ga656dcfd3edf2dd7e5733af4db36bf69c">XHwIcap_GetStatusReg</a></div><div class="ttdeci">#define XHwIcap_GetStatusReg(InstancePtr)</div><div class="ttdoc">Get the contents of the status register. </div><div class="ttdef"><b>Definition:</b> xhwicap.h:403</div></div>
<div class="ttc" id="group__hwicap_html_ga5f6dfed1a6cda2d244f7b58ccf734eb3"><div class="ttname"><a href="group__hwicap.html#ga5f6dfed1a6cda2d244f7b58ccf734eb3">XHI_SR_DONE_MASK</a></div><div class="ttdeci">#define XHI_SR_DONE_MASK</div><div class="ttdoc">Done bit Mask. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:133</div></div>
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<p>This macro checks if the last Read/Write to the ICAP device in the FPGA is completed. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE if the last Read/Write(Config) to the ICAP is NOT completed.</li>
<li>FALSE if the Read/Write(Config) to the ICAP is completed..</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: int <a class="el" href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857" title="This macro checks if the last Read/Write to the ICAP device in the FPGA is completed. ">XHwIcap_IsDeviceBusy(XHwIcap *InstancePtr)</a>; </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>, <a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame()</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>.</p>

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          <td class="memname">#define XHwIcap_IsTransferDone</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;((InstancePtr-&gt;IsTransferInProgress) ? FALSE : TRUE)</td>
        </tr>
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<p>This macro checks if the last Read/Write of the data to the Read/Write FIFO of the HwIcap device is completed. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE if the Read/Write to the FIFO's is completed.</li>
<li>FALSE if the Read/Write to the FIFO's is NOT completed..</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: int <a class="el" href="group__hwicap.html#ga6515e336f30e4f6b3285035a7f939567" title="This macro checks if the last Read/Write of the data to the Read/Write FIFO of the HwIcap device is c...">XHwIcap_IsTransferDone(XHwIcap *InstancePtr)</a>; </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>, and <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>.</p>

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          <td class="memname">#define XHwIcap_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XHwIcap_In32((BaseAddress) + (RegOffset))</td>
        </tr>
      </table>
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<p>Read from the specified HwIcap device register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>contains the offset from the 1st register of the device to select the specific register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The value read from the register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921" title="Read from the specified HwIcap device register. ">XHwIcap_ReadReg(u32 BaseAddress, u32 RegOffset)</a>; </dd></dl>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>, <a class="el" href="group__hwicap.html#ga2493ca18331cba6eb2162449b7dab66e">XHwIcap_Abort()</a>, <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, <a class="el" href="group__hwicap.html#ga92dbad9de7f4a4e41fcde30fc2ebda1c">XHwIcap_FlushFifo()</a>, <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>, <a class="el" href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">XHwIcap_Reset()</a>, and <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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          <td class="memname">#define XHwIcap_SetSizeReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line">(<a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), \</div>
<div class="line">                          <a class="code" href="group__hwicap.html#ga61e8525d9e209cad45122af264f276f0">XHI_SZ_OFFSET</a>, (Data)))</div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga61e8525d9e209cad45122af264f276f0"><div class="ttname"><a href="group__hwicap.html#ga61e8525d9e209cad45122af264f276f0">XHI_SZ_OFFSET</a></div><div class="ttdeci">#define XHI_SZ_OFFSET</div><div class="ttdoc">Size Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:70</div></div>
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<p>Set the number of words to be read from the Icap in the Size register. </p>
<p>The Size Register holds the number of 32 bit words to transfer from the the Icap to the Read FIFO of the HwIcap device.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is the size in words.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style Signature: void <a class="el" href="group__hwicap.html#ga55440f403fc15d562124e9abe8ddbc61" title="Set the number of words to be read from the Icap in the Size register. ">XHwIcap_SetSizeReg(XHwIcap *InstancePtr, u32 Data)</a>; </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>.</p>

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          <td class="memname">#define XHwIcap_SetupFarV5</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Top, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Block, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Row, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">ColumnAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">MinorAddress&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line">(Block &lt;&lt; XHI_FAR_BLOCK_SHIFT) | \</div>
<div class="line">        ((Top &lt;&lt; XHI_FAR_TOP_BOTTOM_SHIFT) | \</div>
<div class="line">         (Row &lt;&lt; XHI_FAR_ROW_ADDR_SHIFT) | \</div>
<div class="line">         (ColumnAddress &lt;&lt; XHI_FAR_COLUMN_ADDR_SHIFT) | \</div>
<div class="line">         (MinorAddress &lt;&lt; XHI_FAR_MINOR_ADDR_SHIFT))</div>
</div><!-- fragment -->
<p>Generates a Type 1 packet header that is written to the Frame Address Register (FAR). </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Block</td><td>- Address Block Type (CLB or BRAM address space) </td></tr>
    <tr><td class="paramname">Top</td><td>- top (0) or bottom (1) half of device </td></tr>
    <tr><td class="paramname">Row</td><td>- Row Address </td></tr>
    <tr><td class="paramname">ColumnAddress</td><td>- CLB or BRAM column </td></tr>
    <tr><td class="paramname">MinorAddress</td><td>- Frame within a column</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Type 1 packet header to write the FAR</dd></dl>
<dl class="section note"><dt>Note</dt><dd>We are retaining this Macro for Backwards compatiblity Use the XHwIcap_SetupFar macro. </dd></dl>

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          <td class="memname">#define XHwIcap_StartConfig</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line">(<a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="code" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, \</div>
<div class="line">                          (<a class="code" href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f">XHwIcap_GetControlReg</a>(InstancePtr) &amp;                                       \</div>
<div class="line">                           (~ <a class="code" href="group__hwicap.html#ga5f79a1af0d4909378342da1723568653">XHI_CR_READ_MASK</a>)) | <a class="code" href="group__hwicap.html#gaef1da3487a4b5b56304445dd5892855b">XHI_CR_WRITE_MASK</a>))</div>
<div class="ttc" id="group__hwicap_html_gae175cdfd7a3fd2a9c0a68c1e4968572f"><div class="ttname"><a href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f">XHwIcap_GetControlReg</a></div><div class="ttdeci">#define XHwIcap_GetControlReg(InstancePtr)</div><div class="ttdoc">Get the contents of the Control register. </div><div class="ttdef"><b>Definition:</b> xhwicap.h:349</div></div>
<div class="ttc" id="group__hwicap_html_gad7d94ec59e14347684d309b0b6406ab2"><div class="ttname"><a href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a></div><div class="ttdeci">#define XHI_CR_OFFSET</div><div class="ttdoc">Control Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:71</div></div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga5f79a1af0d4909378342da1723568653"><div class="ttname"><a href="group__hwicap.html#ga5f79a1af0d4909378342da1723568653">XHI_CR_READ_MASK</a></div><div class="ttdeci">#define XHI_CR_READ_MASK</div><div class="ttdoc">Read from ICAP to FIFO. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:119</div></div>
<div class="ttc" id="group__hwicap_html_gaef1da3487a4b5b56304445dd5892855b"><div class="ttname"><a href="group__hwicap.html#gaef1da3487a4b5b56304445dd5892855b">XHI_CR_WRITE_MASK</a></div><div class="ttdeci">#define XHI_CR_WRITE_MASK</div><div class="ttdoc">Write from FIFO to ICAP. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:120</div></div>
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<p>Set the Control Register to initiate a configuration (write) to the device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style Signature: void <a class="el" href="group__hwicap.html#gac688a85edeec278c8b0c88d00268e19e" title="Set the Control Register to initiate a configuration (write) to the device. ">XHwIcap_StartConfig(XHwIcap *InstancePtr)</a>; </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler()</a>.</p>

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          <td class="memname">#define XHwIcap_StartReadBack</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line">(<a class="code" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress) , <a class="code" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, \</div>
<div class="line">                          (<a class="code" href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f">XHwIcap_GetControlReg</a>(InstancePtr) &amp;                                       \</div>
<div class="line">                           (~ <a class="code" href="group__hwicap.html#gaef1da3487a4b5b56304445dd5892855b">XHI_CR_WRITE_MASK</a>)) | <a class="code" href="group__hwicap.html#ga5f79a1af0d4909378342da1723568653">XHI_CR_READ_MASK</a>))</div>
<div class="ttc" id="group__hwicap_html_gae175cdfd7a3fd2a9c0a68c1e4968572f"><div class="ttname"><a href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f">XHwIcap_GetControlReg</a></div><div class="ttdeci">#define XHwIcap_GetControlReg(InstancePtr)</div><div class="ttdoc">Get the contents of the Control register. </div><div class="ttdef"><b>Definition:</b> xhwicap.h:349</div></div>
<div class="ttc" id="group__hwicap_html_gad7d94ec59e14347684d309b0b6406ab2"><div class="ttname"><a href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a></div><div class="ttdeci">#define XHI_CR_OFFSET</div><div class="ttdoc">Control Register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:71</div></div>
<div class="ttc" id="group__hwicap_html_ga8abfb8a13021622966d96781cb1a0f86"><div class="ttname"><a href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a></div><div class="ttdeci">#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)</div><div class="ttdoc">Write to the specified HwIcap device register. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:180</div></div>
<div class="ttc" id="group__hwicap_html_ga5f79a1af0d4909378342da1723568653"><div class="ttname"><a href="group__hwicap.html#ga5f79a1af0d4909378342da1723568653">XHI_CR_READ_MASK</a></div><div class="ttdeci">#define XHI_CR_READ_MASK</div><div class="ttdoc">Read from ICAP to FIFO. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:119</div></div>
<div class="ttc" id="group__hwicap_html_gaef1da3487a4b5b56304445dd5892855b"><div class="ttname"><a href="group__hwicap.html#gaef1da3487a4b5b56304445dd5892855b">XHI_CR_WRITE_MASK</a></div><div class="ttdeci">#define XHI_CR_WRITE_MASK</div><div class="ttdoc">Write from FIFO to ICAP. </div><div class="ttdef"><b>Definition:</b> xhwicap_l.h:120</div></div>
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<p>Set the Control Register to initiate a ReadBack from the device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style Signature: void <a class="el" href="group__hwicap.html#ga1d43f1b9f75258d0b29b1877a107536b" title="Set the Control Register to initiate a ReadBack from the device. ">XHwIcap_StartReadBack(XHwIcap *InstancePtr)</a>; </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>.</p>

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          <td class="memname">#define XHwIcap_Type1Read</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Register</td><td>)</td>
          <td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line">( (XHI_TYPE_1 &lt;&lt; XHI_TYPE_SHIFT) | (Register &lt;&lt; XHI_REGISTER_SHIFT) | \</div>
<div class="line">          (XHI_OP_READ &lt;&lt; XHI_OP_SHIFT) )</div>
</div><!-- fragment -->
<p>Generates a Type 1 packet header that reads back the requested Configuration register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Register</td><td>is the address of the register to be read back.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Type 1 packet header to read the specified register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>, <a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame()</a>, and <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>.</p>

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          <td class="memname">#define XHwIcap_Type1Write</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Register</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">( (XHI_TYPE_1 &lt;&lt; XHI_TYPE_SHIFT) | (Register &lt;&lt; XHI_REGISTER_SHIFT) | \</div>
<div class="line">          (XHI_OP_WRITE &lt;&lt; XHI_OP_SHIFT) )</div>
</div><!-- fragment -->
<p>Generates a Type 1 packet header that writes to the requested Configuration register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Register</td><td>is the address of the register to be written to.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Type 1 packet header to write the specified register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="group__hwicap.html#gaff2a2db509296264ad44270798b4bed2">XHwIcap_CommandCapture()</a>, <a class="el" href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">XHwIcap_CommandDesync()</a>, <a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame()</a>, and <a class="el" href="group__hwicap.html#ga7b2b996ebb5c5268a07d39e9add552dc">XHwIcap_DeviceWriteFrame()</a>.</p>

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          <td class="memname">#define XHwIcap_Type2Read</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Register</td><td>)</td>
          <td>&#160;&#160;&#160;( XHI_TYPE_2_READ | (Register &lt;&lt; XHI_REGISTER_SHIFT))</td>
        </tr>
      </table>
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<p>Generates a Type 2 packet header that reads back the requested Configuration register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Register</td><td>is the address of the register to be read back.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Type 1 packet header to read the specified register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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          <td class="memname">#define XHwIcap_Type2Write</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Register</td><td>)</td>
          <td></td>
        </tr>
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<b>Value:</b><div class="fragment"><div class="line">( (XHI_TYPE_2 &lt;&lt; XHI_TYPE_SHIFT) | (Register &lt;&lt; XHI_REGISTER_SHIFT) | \</div>
<div class="line">          (XHI_OP_WRITE &lt;&lt; XHI_OP_SHIFT) )</div>
</div><!-- fragment -->
<p>Generates a Type 2 packet header that writes to the requested Configuration register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Register</td><td>is the address of the register to be written to.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Type 1 packet header to write the specified register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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          <td class="memname">#define XHwIcap_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegisterValue&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XHwIcap_Out32((BaseAddress) + (RegOffset), (RegisterValue))</td>
        </tr>
      </table>
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<p>Write to the specified HwIcap device register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>contains the offset from the 1st register of the device to select the specific register. </td></tr>
    <tr><td class="paramname">RegisterValue</td><td>is the value to be written to the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void XHwIcap_WriteReg(u32 BaseAddress, u32 RegOffset, u32 RegisterValue); </dd></dl>

<p>Referenced by <a class="el" href="xhwicap__low__level__example_8c.html#a8a02099406a7fcf25a097b2f45611263">HwIcapLowLevelExample()</a>, <a class="el" href="group__hwicap.html#ga2493ca18331cba6eb2162449b7dab66e">XHwIcap_Abort()</a>, <a class="el" href="group__hwicap.html#ga92dbad9de7f4a4e41fcde30fc2ebda1c">XHwIcap_FlushFifo()</a>, <a class="el" href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">XHwIcap_Reset()</a>, and <a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest()</a>.</p>

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<h2 class="groupheader">Typedef Documentation</h2>
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          <td class="memname">typedef void(* XHwIcap_StatusHandler)(void *CallBackRef, u32 StatusEvent, u32 WordCount)</td>
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<p>The handler data type allows the user to define a callback function to handle the asynchronous processing of the HwIcap driver. </p>
<p>The application using this driver is expected to define a handler of this type to support interrupt driven mode. The handler executes in an interrupt context such that minimal processing should be performed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>is a callback reference passed in by the application layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is unimportant to the driver component, so it is a void pointer. </td></tr>
    <tr><td class="paramname">StatusEvent</td><td>indicates one or more status events that occurred. See the XHwIcap_SetInterruptHandler for details on the status events that can be passed in the callback. </td></tr>
    <tr><td class="paramname">WordCount</td><td>indicates how many words of data were successfully transferred. This may be less than the number of words requested if there was an error. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">void XHwIcap_Abort </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function initiates the Abort Sequence by setting the Abort bit in the control register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, <a class="el" href="group__hwicap.html#ga776ac9dc4020f86bab9c5b1fd9221dd1">XHI_CR_SW_ABORT_MASK</a>, <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>, and <a class="el" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>.</p>

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          <td class="memname">int XHwIcap_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a> *&#160;</td>
          <td class="paramname"><em>ConfigPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function initializes a specific <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </p>
<p>The IDCODE is read from the FPGA and based on the IDCODE the information about the resources in the FPGA is filled in the instance structure.</p>
<p>The HwIcap device will be in put in a reset state before exiting this function.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">ConfigPtr</td><td>points to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> device configuration structure. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory address space. If the address translation is not used then the physical address is passed. Unexpected errors may occur if the address mapping is changed after this function is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS else XST_FAILURE</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>
<p>Set IcapWidth</p>
<p>Set IsLiteMode </p>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#abd5f77c5e222b3372623794a6d8bb05c">XHwIcap::BytesPerFrame</a>, <a class="el" href="struct_x_hw_icap.html#a1fbb30f90288a5c42de2e456b6ca510e">XHwIcap::DeviceFamily</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap___config.html#a65bee38ed10f278be07d83822af3439d">XHwIcap_Config::IcapWidth</a>, <a class="el" href="struct_x_hw_icap___config.html#af8647231b7f462e3083ad2fcbc6647e8">XHwIcap_Config::IsLiteMode</a>, <a class="el" href="struct_x_hw_icap.html#a1034ea22a5d2bb5a3eab6e5abe6a6423">XHwIcap::IsPolled</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="struct_x_hw_icap.html#a6f6de856eedef3b63c0df360781984d6">XHwIcap::IsTransferInProgress</a>, <a class="el" href="group__hwicap.html#ga52f19423a8a68df00cec1517428d8cf7">PCAP_CR_OFFSET</a>, <a class="el" href="struct_x_hw_icap.html#aab5f5571907cba99091ede9d3cadd039">XHwIcap::StatusHandler</a>, <a class="el" href="struct_x_hw_icap.html#a3f9285b94c87fa0052336a7fdeb75bf4">XHwIcap::WordsPerFrame</a>, <a class="el" href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">XHwIcap_CommandDesync()</a>, <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>, and <a class="el" href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">XHwIcap_Reset()</a>.</p>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>, <a class="el" href="xhwicap__read__config__reg__example_8c.html#aff450c6f4c090a7ccc5cb22bbaae0dda">HwIcapReadConfigRegExample()</a>, <a class="el" href="xhwicap__read__frame__polled__example_8c.html#aa60b2d782acf4fcd0561a584cd4606e5">HwIcapReadFramePolledExample()</a>, and <a class="el" href="xhwicap__testapp__example_8c.html#a8ec404c64fa0f2804000ca6744074f0a">HwIcapTestAppExample()</a>.</p>

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          <td class="memname">int XHwIcap_CommandCapture </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>Sends a CAPTURE command to the ICAP port. </p>
<p>This command captures all of the flip flop states so they will be available during readback. One can use this command instead of enabling the CAPTURE block in the design.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga3b59b1dac14d84654658e66206861848">XHwIcap_Type1Write</a>.</p>

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          <td class="memname">int XHwIcap_CommandDesync </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>Sends a DESYNC command to the ICAP port. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>- a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance to be worked on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS else XST_FAILURE</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga3b59b1dac14d84654658e66206861848">XHwIcap_Type1Write</a>.</p>

<p>Referenced by <a class="el" href="group__hwicap.html#gad497b5129aff666181e85457f1c5f678">XHwIcap_CfgInitialize()</a>, <a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame()</a>, and <a class="el" href="group__hwicap.html#ga7b2b996ebb5c5268a07d39e9add552dc">XHwIcap_DeviceWriteFrame()</a>.</p>

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          <td class="memname">int XHwIcap_DeviceRead </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>FrameBuffer</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumWords</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function reads the specified number of words from the ICAP device in the polled mode. </p>
<p>Interrupt mode is not supported in reading data from the ICAP device.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">FrameBuffer</td><td>is a pointer to the memory where the frame read from the ICAP device is stored. </td></tr>
    <tr><td class="paramname">NumWords</td><td>is the number of words (16 bit for S6 and 32 bit for all other devices) to write to the ICAP device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the specified number of words have been read from the ICAP device</li>
<li>XST_FAILURE if the device is busy with the last Read/Write or if the requested number of words have not been read from the ICAP device, or there is a timeout.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is a blocking function. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap___config.html#a65bee38ed10f278be07d83822af3439d">XHwIcap_Config::IcapWidth</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="struct_x_hw_icap.html#a6f6de856eedef3b63c0df360781984d6">XHwIcap::IsTransferInProgress</a>, <a class="el" href="struct_x_hw_icap.html#a6d23e949e46c1a0d88dd6ea065dc70c0">XHwIcap::RemainingWords</a>, <a class="el" href="struct_x_hw_icap.html#a694bf48b4c008d20e058cb5f610f35f5">XHwIcap::RequestedWords</a>, <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, <a class="el" href="group__hwicap.html#ga5f79a1af0d4909378342da1723568653">XHI_CR_READ_MASK</a>, <a class="el" href="group__hwicap.html#gab24c5878ebb17d6bb12e6e6f00a70ccc">XHwIcap_FifoRead</a>, <a class="el" href="group__hwicap.html#gaa5372c712425f6f8c3cc116a79f29cf3">XHwIcap_GetRdFifoOccupancy</a>, <a class="el" href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857">XHwIcap_IsDeviceBusy</a>, <a class="el" href="group__hwicap.html#ga6515e336f30e4f6b3285035a7f939567">XHwIcap_IsTransferDone</a>, <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>, <a class="el" href="group__hwicap.html#ga55440f403fc15d562124e9abe8ddbc61">XHwIcap_SetSizeReg</a>, and <a class="el" href="group__hwicap.html#ga1d43f1b9f75258d0b29b1877a107536b">XHwIcap_StartReadBack</a>.</p>

<p>Referenced by <a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame()</a>, and <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>.</p>

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          <td class="memname">int XHwIcap_DeviceReadFrame </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>Top</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>Block</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>HClkRow</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>MajorFrame</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>MinorFrame</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>FrameBuffer</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reads one frame from the device and puts it in memory specified by the user. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>- a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance to be worked on. </td></tr>
    <tr><td class="paramname">Top</td><td>- top (0) or bottom (1) half of device </td></tr>
    <tr><td class="paramname">Block</td><td>- Block Address (XHI_FAR_CLB_BLOCK, XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK) </td></tr>
    <tr><td class="paramname">HClkRow</td><td>- selects the HClk Row </td></tr>
    <tr><td class="paramname">MajorFrame</td><td>- selects the column </td></tr>
    <tr><td class="paramname">MinorFrame</td><td>- selects frame inside column </td></tr>
    <tr><td class="paramname">FrameBuffer</td><td>is a pointer to the memory where the frame read from the device is stored</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS else XST_FAILURE.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is a blocking call. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap.html#a1fbb30f90288a5c42de2e456b6ca510e">XHwIcap::DeviceFamily</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="struct_x_hw_icap.html#a3f9285b94c87fa0052336a7fdeb75bf4">XHwIcap::WordsPerFrame</a>, <a class="el" href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">XHwIcap_CommandDesync()</a>, <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, <a class="el" href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857">XHwIcap_IsDeviceBusy</a>, <a class="el" href="group__hwicap.html#ga4306e4bf6223f5f27a2d971657028f47">XHwIcap_Type1Read</a>, and <a class="el" href="group__hwicap.html#ga3b59b1dac14d84654658e66206861848">XHwIcap_Type1Write</a>.</p>

<p>Referenced by <a class="el" href="xhwicap__read__frame__polled__example_8c.html#aa60b2d782acf4fcd0561a584cd4606e5">HwIcapReadFramePolledExample()</a>.</p>

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          <td class="memname">int XHwIcap_DeviceWrite </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>FrameBuffer</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumWords</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function writes the given user data to the Write FIFO in both the polled mode and the interrupt mode and starts the transfer of the data to the ICAP device. </p>
<p>In the polled mode, this function will write the specified number of words into the FIFO before returning.</p>
<p>In the interrupt mode, this function will write the words upto the size of the Write FIFO and starts the transfer, then subsequent transfer of the data is performed by the interrupt service routine until the entire buffer has been transferred. The status callback function is called when the entire buffer has been sent. In order to use interrupts, it is necessary for the user to connect the driver interrupt handler, <a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842" title="The interrupt handler for HwIcap interrupts. ">XHwIcap_IntrHandler()</a>, to the interrupt system of the application and enable the interrupts associated with the Write FIFO. The user has to enable the interrupts each time this function is called using the XHwIcap_IntrEnable macro.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">FrameBuffer</td><td>is a pointer to the data to be written to the ICAP device. </td></tr>
    <tr><td class="paramname">NumWords</td><td>is the number of words (16 bit for S6 and 32 bit for all other devices)to write to the ICAP device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function is a blocking for the polled mode of operation and is non-blocking for the interrupt mode of operation. Use the function XHwIcap_DeviceWriteFrame for writing a frame of data to the ICAP device. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap___config.html#a65bee38ed10f278be07d83822af3439d">XHwIcap_Config::IcapWidth</a>, <a class="el" href="struct_x_hw_icap.html#a1034ea22a5d2bb5a3eab6e5abe6a6423">XHwIcap::IsPolled</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="struct_x_hw_icap.html#a6f6de856eedef3b63c0df360781984d6">XHwIcap::IsTransferInProgress</a>, <a class="el" href="struct_x_hw_icap.html#a6d23e949e46c1a0d88dd6ea065dc70c0">XHwIcap::RemainingWords</a>, <a class="el" href="struct_x_hw_icap.html#a694bf48b4c008d20e058cb5f610f35f5">XHwIcap::RequestedWords</a>, <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, <a class="el" href="group__hwicap.html#gaef1da3487a4b5b56304445dd5892855b">XHI_CR_WRITE_MASK</a>, <a class="el" href="group__hwicap.html#ga578d555615b032cd9675c91f60dfb2bd">XHwIcap_FifoWrite</a>, <a class="el" href="group__hwicap.html#gada2fee3cdacf928be46488879f32bf8a">XHwIcap_GetWrFifoVacancy</a>, <a class="el" href="group__hwicap.html#ga161e6cb1deac088c298c11c6400da295">XHwIcap_IntrClear</a>, <a class="el" href="group__hwicap.html#ga9ea29151eef34461b2a964bba048c22f">XHwIcap_IntrGetStatus</a>, <a class="el" href="group__hwicap.html#gad2dd5620c4ac7d9dee393f4e38446685">XHwIcap_IntrGlobalDisable</a>, <a class="el" href="group__hwicap.html#gaa952277368fc2024057861071922661f">XHwIcap_IntrGlobalEnable</a>, <a class="el" href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857">XHwIcap_IsDeviceBusy</a>, <a class="el" href="group__hwicap.html#ga6515e336f30e4f6b3285035a7f939567">XHwIcap_IsTransferDone</a>, <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>, and <a class="el" href="group__hwicap.html#gac688a85edeec278c8b0c88d00268e19e">XHwIcap_StartConfig</a>.</p>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>, <a class="el" href="group__hwicap.html#gaff2a2db509296264ad44270798b4bed2">XHwIcap_CommandCapture()</a>, <a class="el" href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">XHwIcap_CommandDesync()</a>, <a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame()</a>, <a class="el" href="group__hwicap.html#ga7b2b996ebb5c5268a07d39e9add552dc">XHwIcap_DeviceWriteFrame()</a>, and <a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg()</a>.</p>

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          <td class="memname">int XHwIcap_DeviceWriteFrame </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>Top</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>Block</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>HClkRow</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>MajorFrame</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">long&#160;</td>
          <td class="paramname"><em>MinorFrame</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>FrameData</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Writes one frame from the specified buffer and puts it in the device (ICAP). </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">Top</td><td>- top (0) or bottom (1) half of device </td></tr>
    <tr><td class="paramname">Block</td><td>- Block Address (XHI_FAR_CLB_BLOCK, XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK) </td></tr>
    <tr><td class="paramname">HClkRow</td><td>- selects the HClk Row </td></tr>
    <tr><td class="paramname">MajorFrame</td><td>- selects the column </td></tr>
    <tr><td class="paramname">MinorFrame</td><td>- selects frame inside column </td></tr>
    <tr><td class="paramname">FrameData</td><td>is a pointer to the frame that is to be written to the device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS else XST_FAILURE.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is a blocking function. This function is used in conjunction with the function XHwIcap_DeviceReadFrame. This function is used to write back the frame of data read using the XHwIcap_DeviceReadFrame. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap.html#a1e2e190f1bd74c7aa6fbe31288ee6619">XHwIcap::DeviceIdCode</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="struct_x_hw_icap.html#a3f9285b94c87fa0052336a7fdeb75bf4">XHwIcap::WordsPerFrame</a>, <a class="el" href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">XHwIcap_CommandDesync()</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, and <a class="el" href="group__hwicap.html#ga3b59b1dac14d84654658e66206861848">XHwIcap_Type1Write</a>.</p>

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          <td class="memname">void XHwIcap_FlushFifo </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function flushes the FIFOs in the device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="group__hwicap.html#gafd19f105fe87bc06e8970c46f2f23508">XHI_CR_FIFO_CLR_MASK</a>, <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>, and <a class="el" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>.</p>

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          <td class="memname">u32 XHwIcap_GetConfigReg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ConfigReg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>RegData</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the value of the specified configuration register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">ConfigReg</td><td>is a constant which represents the configuration register value to be returned. Constants specified in <a class="el" href="xhwicap__i_8h.html">xhwicap_i.h</a>. Examples: XHI_IDCODE, XHI_FLR. </td></tr>
    <tr><td class="paramname">RegData</td><td>is the value of the specified configuration register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is a blocking call. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, <a class="el" href="group__hwicap.html#gaef1da3487a4b5b56304445dd5892855b">XHI_CR_WRITE_MASK</a>, <a class="el" href="group__hwicap.html#ga4b189772fde4c6ca3bc0c20b7b1fc3af">XHI_SR_EOS_MASK</a>, <a class="el" href="group__hwicap.html#gad582c2c3fe5aa1d83b43dc7a0d243da8">XHI_SR_OFFSET</a>, <a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead()</a>, <a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite()</a>, <a class="el" href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857">XHwIcap_IsDeviceBusy</a>, <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>, and <a class="el" href="group__hwicap.html#ga4306e4bf6223f5f27a2d971657028f47">XHwIcap_Type1Read</a>.</p>

<p>Referenced by <a class="el" href="xhwicap__read__config__reg__example_8c.html#aff450c6f4c090a7ccc5cb22bbaae0dda">HwIcapReadConfigRegExample()</a>, <a class="el" href="xhwicap__testapp__example_8c.html#a8ec404c64fa0f2804000ca6744074f0a">HwIcapTestAppExample()</a>, and <a class="el" href="group__hwicap.html#gad497b5129aff666181e85457f1c5f678">XHwIcap_CfgInitialize()</a>.</p>

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          <td class="memname">void XHwIcap_IntrHandler </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>The interrupt handler for HwIcap interrupts. </p>
<p>This function must be connected by the user to an interrupt source.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The interrupts are being used only while writing data to the ICAP device. The reading of the data from the ICAP device is done in polled mode. In a worst case scenario the interrupt handler can be busy writing large amount of data to the Write FIFO. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap.html#a6f6de856eedef3b63c0df360781984d6">XHwIcap::IsTransferInProgress</a>, <a class="el" href="struct_x_hw_icap.html#a6d23e949e46c1a0d88dd6ea065dc70c0">XHwIcap::RemainingWords</a>, <a class="el" href="struct_x_hw_icap.html#a694bf48b4c008d20e058cb5f610f35f5">XHwIcap::RequestedWords</a>, <a class="el" href="struct_x_hw_icap.html#aab5f5571907cba99091ede9d3cadd039">XHwIcap::StatusHandler</a>, <a class="el" href="struct_x_hw_icap.html#a6b08114ef8b6d6478e9ae4890e68f671">XHwIcap::StatusRef</a>, <a class="el" href="group__hwicap.html#ga3d51a2ca2954770e68e8304c6d45a797">XHI_IPIXR_WRP_MASK</a>, <a class="el" href="group__hwicap.html#ga578d555615b032cd9675c91f60dfb2bd">XHwIcap_FifoWrite</a>, <a class="el" href="group__hwicap.html#gada2fee3cdacf928be46488879f32bf8a">XHwIcap_GetWrFifoVacancy</a>, <a class="el" href="group__hwicap.html#ga161e6cb1deac088c298c11c6400da295">XHwIcap_IntrClear</a>, <a class="el" href="group__hwicap.html#ga9ea29151eef34461b2a964bba048c22f">XHwIcap_IntrGetStatus</a>, <a class="el" href="group__hwicap.html#gad2dd5620c4ac7d9dee393f4e38446685">XHwIcap_IntrGlobalDisable</a>, and <a class="el" href="group__hwicap.html#gac688a85edeec278c8b0c88d00268e19e">XHwIcap_StartConfig</a>.</p>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>.</p>

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          <td>(</td>
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<p>Looks up the device configuration based on the unique device ID. </p>
<p>A table contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>contains the ID of the device for which the device configuration pointer is to be returned.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>A pointer to the configuration found.</li>
<li>NULL if the specified device ID was not found.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>, <a class="el" href="xhwicap__read__config__reg__example_8c.html#aff450c6f4c090a7ccc5cb22bbaae0dda">HwIcapReadConfigRegExample()</a>, <a class="el" href="xhwicap__read__frame__polled__example_8c.html#aa60b2d782acf4fcd0561a584cd4606e5">HwIcapReadFramePolledExample()</a>, and <a class="el" href="xhwicap__testapp__example_8c.html#a8ec404c64fa0f2804000ca6744074f0a">HwIcapTestAppExample()</a>.</p>

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          <td class="memname">void XHwIcap_Reset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function forces the software reset of the complete HWICAP device. </p>
<p>All the registers will return to the default value and the FIFO is also flushed as a part of this software reset.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>, <a class="el" href="group__hwicap.html#ga50e289c4313fa405cf086df7ce901a1b">XHI_CR_SW_RESET_MASK</a>, <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>, and <a class="el" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__hwicap.html#gad497b5129aff666181e85457f1c5f678">XHwIcap_CfgInitialize()</a>.</p>

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          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>Run a self-test on the driver/device. </p>
<p>The test</p>
<ul>
<li>Writes to the Interrupt Enable Register and reads it back for comparison.</li>
</ul>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the value read from the register is the same as the value written.</li>
<li>XST_FAILURE otherwise</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hw_icap___config.html#a6be849d17f51b639414cae9620f2dcd5">XHwIcap_Config::BaseAddress</a>, <a class="el" href="struct_x_hw_icap.html#aab0ffe813aa173907a53fbdfe62de599">XHwIcap::HwIcapConfig</a>, <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="group__hwicap.html#gacc55662e7438a63d17100c391701bca0">XHI_GIER_OFFSET</a>, <a class="el" href="group__hwicap.html#ga796c30e8bebadbe5c18ce0af9b10d30a">XHI_IPIXR_ALL_MASK</a>, <a class="el" href="group__hwicap.html#gae64834b12bee384ff441cf4ca68b060b">XHI_IPIXR_RDP_MASK</a>, <a class="el" href="group__hwicap.html#ga47f9b5b4f4e16c810064acf5ce674575">XHI_IPIXR_WEMPTY_MASK</a>, <a class="el" href="group__hwicap.html#gadd39ee74d909817a0ecd1d5145f36920">XHwIcap_IntrDisable</a>, <a class="el" href="group__hwicap.html#gabf5d9b150a34fa3759415531b833f81a">XHwIcap_IntrEnable</a>, <a class="el" href="group__hwicap.html#ga50e8cae31685b6c7e2bb880fd1138209">XHwIcap_IntrGetEnabled</a>, <a class="el" href="group__hwicap.html#gad2dd5620c4ac7d9dee393f4e38446685">XHwIcap_IntrGlobalDisable</a>, <a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>, and <a class="el" href="group__hwicap.html#ga8abfb8a13021622966d96781cb1a0f86">XHwIcap_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>, <a class="el" href="xhwicap__read__config__reg__example_8c.html#aff450c6f4c090a7ccc5cb22bbaae0dda">HwIcapReadConfigRegExample()</a>, <a class="el" href="xhwicap__read__frame__polled__example_8c.html#aa60b2d782acf4fcd0561a584cd4606e5">HwIcapReadFramePolledExample()</a>, and <a class="el" href="xhwicap__testapp__example_8c.html#a8ec404c64fa0f2804000ca6744074f0a">HwIcapTestAppExample()</a>.</p>

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          <td class="memname">void XHwIcap_SetInterruptHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
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          <td class="paramkey"></td>
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          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackRef</em>, </td>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__hwicap.html#gac66fc3c032512dfc47f97bc87d97ca4b">XHwIcap_StatusHandler</a>&#160;</td>
          <td class="paramname"><em>FuncPtr</em>&#160;</td>
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          <td>)</td>
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<p>Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to the higher layer software. </p>
<p>The handler executes in an interrupt context, so it must minimize the amount of processing performed such as transferring data to a thread context. One of the following status events is passed to the status handler. </p>
<pre></pre><pre></pre> <dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance. </td></tr>
    <tr><td class="paramname">CallBackRef</td><td>is the upper layer callback reference passed back when the callback function is invoked. </td></tr>
    <tr><td class="paramname">FuncPtr</td><td>is the pointer to the callback function.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The handler is called within interrupt context, so it should do its work quickly and queue potentially time-consuming work to a task-level thread. </p>

<p>References <a class="el" href="struct_x_hw_icap.html#a7e038eb9c938aaedaf156b772fc4de0c">XHwIcap::IsReady</a>, <a class="el" href="struct_x_hw_icap.html#aab5f5571907cba99091ede9d3cadd039">XHwIcap::StatusHandler</a>, and <a class="el" href="struct_x_hw_icap.html#a6b08114ef8b6d6478e9ae4890e68f671">XHwIcap::StatusRef</a>.</p>

<p>Referenced by <a class="el" href="xhwicap__intr__example_8c.html#ae0c9d1a60762a9c150b8814b0912a32a">HwIcapIntrExample()</a>.</p>

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<h2 class="groupheader">Variable Documentation</h2>
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          <td class="memname"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a> XHwIcap_ConfigTable[]</td>
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<p>The configuration table for opb_hwicap devices. </p>

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          <td class="memname"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a> XHwIcap_ConfigTable[XPAR_XHWICAP_NUM_INSTANCES]</td>
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<b>Initial value:</b><div class="fragment"><div class="line">= {</div>
<div class="line">        {</div>
<div class="line">                XPAR_HWICAP_0_DEVICE_ID,    </div>
<div class="line">                XPAR_HWICAP_0_BASEADDR,     </div>
<div class="line">        },</div>
<div class="line">}</div>
</div><!-- fragment -->
<p>The configuration table for opb_hwicap devices. </p>

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